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Face Recognition Using Weighted Modular Principle Component Analysis.
A. Pavan Kumar, Sukhendu Das, V. Kamakoti
Appeared in
Neural Information Processing, 11th International Conference, ICONIP 2004, Calcutta, India, November 22-25, 2004, Proceedings (ICONIP 2004),
Lecture Notes in Computer Science, Vol 3316, pp.362-367, Nov 2004.
MemMap-pd: Performance Driven Technology Mapping Algorithm for FPGAs with Embedded Memory Blocks.
R. Manimegalai, A. Manoj Kumar, B. Jayaram, V. Kamakoti
Appeared in
Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings (FPL 2004),
Lecture Notes in Computer Science, Vol 3203, pp.1185, Aug 2004.
MemMap-pd: Performance Driven Technology Mapping Algorithm for FPGAs with Embedded Memory Arrays.
A. Manoj Kumar, B. Jayaram, R. Manimegalai, V. Kamakoti
Appeared in
18th International Parallel and Distributed Processing Symposium (IPDPS 2004), CD-ROM / Abstracts Proceedings, 26-30 April 2004, Santa Fe, New Mexico, USA (IPDPS 2004),
Apr 2004.
An Evolutionary Algorithm for Automatic Spatial Partitioning in Reconfigurable Environments.
MemMap: Technology Mapping Algorithm for Area Reduction in FPGAs with Embedded Memory Arrays Using Reconvergence Analysis.
A. Manoj Kumar, Jayaram Bobba, V. Kamakoti
Appeared in
2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France (DATE 2004),
pp.922-929, Feb 2004.
SHAPER: synthesis for hybrid FPGA architectures containing PLA elements using reconvergence analysis.
A. Manoj Kumar, B. Jayaram, V. Kamakoti
Appeared in
Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, FPGA 2004, Monterey, California, USA, February 22-24, 2004 (FPGA 2004),
pp.251, Feb 2004.
A Parallel Architectural Implementation Of The New Three-Step Search Algorithm For Block Motion Estimation.
Kavish Seth, P. Rangarajan, S. Srinivasan, V. Kamakoti, V. Bala Kuteshwar
Appeared in
17th International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India,
pp.1071-1076, Jan 2004.
A Bus Encoding Technique for Power and Cross-talk Minimization.
P. Subrahmanya, R. Manimegalai, V. Kamakoti, Madhu Mutyam
Appeared in
17th International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India,
pp.443-448, Jan 2004.
Parallel Partitioning Techniques for Logic Minimization Using Redundancy Identification.
B. Jayaram, A. Manoj Kumar, V. Kamakoti
Appeared in
High Performance Computing - HiPC 2003, 10th International Conference, Hyderabad, India, December 17-20, 2003, Proceedings,
Lecture Notes in Computer Science, Vol 2913, pp.174-183, Dec 2003.
A Parallel Evolutionary Approach to Spatial Partitioning in Reconfigurable Environments.
Testable Clock Routing Architecture for Field Programmable Gate Arrays.
L. Kalyan Kumar, Amol J. Mupid, Aditya S. Ramani, V. Kamakoti
Appeared in
Field Programmable Logic and Application, 13th International Conference, FPL 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings (FPL 2003),
Lecture Notes in Computer Science, Vol 2778, pp.1044-1047, Sep 2003.
On-Line Location of Multiple Faults in LUT Based Reconfigurable Systems.
M. Madhu, V. Srinivasa Murty, V. Kamakoti
Appeared in
2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), New Trends and Technologies for VLSI Systems Design, 20-21 February 2003, Tampa, FL, USA (ISVLSI 2003),
pp.252-253, Feb 2003.
A novel three phase parallel genetic approach to routing for field programmable gate arrays.
Annamalai Muthukaruppan, Sivaprakasam Suresh, V. Kamakoti
Appeared in
Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology, FPT 2002, Hong Kong, China, December 16-18, 2002 (FPT 2002),
pp.336-339, Dec 2002.
Toward Optimal Player Weights in Secure Distributed Protocols.
K. Srinathan, C. Pandu Rangan, V. Kamakoti
Appeared in
Progress in Cryptology - INDOCRYPT 2001, Second International Conference on Cryptology in India, Chennai, India, December 16-20, 2001, Proceedings (INDOCRYPT 2001),
Lecture Notes in Computer Science, Vol 2247, pp.232-241, Dec 2001.
Adaptive finite element analysis on a parallel and distributed environment.
The Colored Sector Search Tree: A Dynamic Data Structure for Efficient High Dimensional Nearest-Foreign-Neighbor Queries.
Thomas Graf, V. Kamakoti, N. S. Janaki Latha, C. Pandu Rangan
Appeared in
Computing and Combinatorics, 4th Annual International Conference, COCOON '98, Taipei, Taiwan, R.o.C., August 12-14, 1998, Proceedings,
Lecture Notes in Computer Science, Vol 1449, pp.35-44, Aug 1998.
An Optimal Algorithm for Computing Vissible Nearest Foreign Neighbors Among Colored Line Segments.
Thorsten Graf, V. Kamakoti
Appeared in
Algorithm Theory - SWAT '98, 6th Scandinavian Workshop on Algorithm Theory, Stockholm, Sweden, July, 8-10, 1998, Proceedings,
Lecture Notes in Computer Science, Vol 1432, pp.59-70, Jul 1998.
Reducing Simple Polygons to Triangles - A Proof for an Improved Conjecture.
Thorsten Graf, V. Kamakoti
Appeared in
Automata, Languages and Programming, 25th International Colloquium, ICALP'98, Aalborg, Denmark, July 13-17, 1998, Proceedings,
Lecture Notes in Computer Science, Vol 1443, pp.130-139, Jul 1998.
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