Lab Details

PACE Lab : Programming Languages, Architecture, Compilers Education LaboratoryLink to Lab Webpage

Research Areas	Memory System Design, Network-on-chip architectures, Cache Design in Multicore, Program Analysis, Parallelization, Code Optimization.
Members	Faculty : Madhu Mutyam, V. Krishna Nandivada, Rupesh Nasre, Vijay Natarajan. Students/Scholars : . PhD : Raghesh A, Praveen Kumar Alapati, Gnaneswara Rao J, Aman Nougrahiya, Jyothi Krishna V S, Manas Thakur, Venkata Naga Jyothi V, Saurabh Mohanrao Kalikar, Chongala .S.R.Swamy Saranam, Somesh Singh, Somesh Singh, Shouvick Mondal, Anju M A. MS : Nizamudheen Ahmed, Shashidhar G, Rakesh Patil, Rahul Shrivastava, Dennis Antony Varkey, Anchu R S, Aman Sharma, Sayantan Ray, Puneet Saraf, Arun T, Joe Augustine, Rajendra Kumar Dangwal, Diptanshu Kakwani. M.Tech : Manoj Gangadhar Dongare, Akshay M Potey, Abhishek Chakraborty, Himanshu Gaur, Preetam Kumar Ghosh, Ajay Sharma, Tejas Wangikar, Gaurav Arora, Atul Dhiman, Shahbaz Husain, Bokka Pradeep, Kamat Shantanu Sunil, Ankur Yadav. B.Tech(DD) : Akshay Utture, Sistla Meghana Aparna, Bikash Gogoi. Project Staffs :
Recent Publications	Optimizing graph processing on GPUs using approximate computing: poster. Somesh Singh , Rupesh Nasre Appeared in Proceedings of the 24th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPoPP 2019, Washington, DC, USA, February 16-20, 2019, pp.395-396, Feb 2019 Optimizing remote data transfers in X10. Arun T , V. Krishna Nandivada Appeared in Proceedings of the 27th International Conference on Parallel Architectures and Compilation Techniques, PACT 2018, Limassol, Cyprus, November 01-04, 2018, pp.27:1-27:15, Nov 2018 NumLock: Towards Optimal Multi-Granularity Locking in Hierarchies. Saurabh Kalikar , Rupesh Nasre Appeared in Proceedings of the 47th International Conference on Parallel Processing, ICPP 2018, Eugene, OR, USA, August 13-16, 2018, pp.75:1-75:10, Aug 2018 Multi-granularity Locking in Hierarchies with Synergistic Hierarchical and Fine-Grained Locks. K. Ganesh , Saurabh Kalikar , Rupesh Nasre Appeared in Euro-Par 2018: Parallel Processing - 24th International Conference on Parallel and Distributed Computing, Turin, Italy, August 27-31, 2018, Proceedings, Lecture Notes in Computer Science, Vol 11014, pp.546-559, Aug 2018 TDC: Tagless DRAM Cache. S. R. Swamy Saranam , Madhu Mutyam Appeared in 2018 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2018, Hong Kong, China, July 8-11, 2018, pp.88-93, Jul 2018
Sponsored Projects	Dynamic Graph Algorithms on Manycores (Funding Agency :IITM-ERP) Formal Verification and Synthesis of Secure Designs. (Funding Agency :NFSG) Exploring Techniques to Optimize Main Memory of Multi-Core Systems (Funding Agency :DST) IBM Shared University Research Grant (Funding Agency :IBM-SURG) Research funding from Board of Research in Nuclear Sciences (Funding Agency :DAE)

Department of Computer Science & Engineering

Indian Institute of Technology Madras, Chennai, India.